x86/VPMU: clear the overflow status of which counter happened to overflow
authorLuwei Kang <luwei.kang@intel.com>
Wed, 18 Jan 2017 08:46:54 +0000 (09:46 +0100)
committerJan Beulich <jbeulich@suse.com>
Wed, 18 Jan 2017 08:46:54 +0000 (09:46 +0100)
Just set the corresponding bits of counters which happened to overflow,
rather than setting all the available bits of IA32_PERF_GLOBAL_OVF_CTRL
when pmu interrupt happened.

Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
master commit: 7a0c70482580234868fcc53b8d72e31966dc7c52
master date: 2016-12-13 14:21:26 +0100

xen/arch/x86/cpu/vpmu_intel.c

index e8049ed08ff0e8c88abbf68dcf24878331614705..613aafeccd5303d20b1398ea22cc632b111023fa 100644 (file)
@@ -868,7 +868,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs *regs)
         if ( is_pmc_quirk )
             handle_pmc_quirk(msr_content);
         core2_vpmu_cxt->global_status |= msr_content;
-        msr_content = ~global_ovf_ctrl_mask;
+        msr_content &= ~global_ovf_ctrl_mask;
         wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, msr_content);
     }
     else